Software
Repositories
µIR - Microarchitecture Intermediate Representation (MICRO'19)
High-level synthesis and Accelerator generation tool
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Deepframe (PACT'19)
Deep-learning based trace compiler for constructing accelerator offload
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Accelerator Benchmarks (IISWC'16)
Accelerator extracted from SPEC workloads
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CHAINSAW (MICRO'16)
Identifying common CISC macros across applications
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FUSION Protocol (ISCA'15)
Simulation infrastructure for modelling hardware accelerator coherence
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GPGPU-Sim + Wisconsin Ruby
Simulation infrastructure and workloads for Temporal Coherence
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Organizations