There is a memory locking mechanism implemented for atomic instructions that prevents processors in a multi-processor system from breaking atomic properties. An atomic instruction typically consists of a load and a store part that must be performed without any intervening conflicting transactions. MAI handles this by locking a ram region at a configurable granularity when the first access is issued. The lock is released as soon as the second access is finished or if the instruction is squashed. Any conflicting transaction to the same memory region issued between the two by any processor will stall until the lock is released. The granularity can be set in each ram object to control the size of a region. If the size is set to 0 no locking will be performed and it is then up to the timing model to handle the locking. The default granularity is set to 8 bytes.