typedef struct {
int valid;
physical_address_t paddr;
} tagged_physical_address_t;
typedef struct {
void (*flush_all)(conf_object_t *obj,
int keep_global_entries);
void (*flush_page)(conf_object_t *obj,
linear_address_t laddr);
int (*lookup)(conf_object_t *obj,
x86_memory_transaction_t *mem_tr);
void (*add)(conf_object_t *obj,
processor_mode_t mode,
read_or_write_t read_or_write,
data_or_instr_t data_or_instr,
int global_page,
x86_memory_type_t pat_type,
x86_memory_type_t mtrr_type,
linear_address_t laddr,
physical_address_t paddr,
int page_size);
tagged_physical_address_t (*itlb_lookup)(conf_object_t *obj,
linear_address_t laddr,
processor_mode_t mode);
} x86_tlb_interface_t;
#define X86_TLB_INTERFACE "x86-tlb"
All functions in the interface get the object implementing the interface as their first parameter.
flush_all is called when all TLB entries should be flushed. If keep_global_entries is set, then TLB entries with their global bit set should not be flushed.
flush_page is invoked when pages containing laddr are to be removed from the TLB.
lookup is used by the CPU when a memory access misses the STC. It must return true (non-zero) if and only if the memory operation specified by mem_tr hits the TLB and does not raise an exception. The mode, linear_address are valid when the method is invoked. The other fields passed through mem_tr are undefined. If the method returns true, the s.physical_address, pat_type, and mtrr_type fields of mem_tr must be updated by lookup.
An access that misses in lookup but does not raise a fault is inserted into the TLB with add. The page_size encoding is 0 for 4 kb pages, 1 for 2 Mb pages, and 2 for 4 Mb pages.
itlb_lookup is a simplified version of lookup used only for instruction TLB lookups. If the lookup is successful valid and paddr should be set, otherwise valid should be cleared.
It class implementing the interface must make sure that only addresses mapped in the TLB are present in the STCs.
This interface may be changed or replaced with an architecture independent interface in future versions of Simics.