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ppc440gx-sdr

Provided by

440gx-devices

Class Hierarchy

conf-object → log-object → ppc440gx-sdr

Interfaces Implemented

log_object, io_memory

Description

The ppc440gx-sdr device implements the functionality of the ppc440gx system device control register (SDR) register file.

Attributes

Attributes inherited from class conf-object

attributes, classname, component, iface, name, object_id, queue

Attributes inherited from class log-object

access_count, log_buffer, log_buffer_last, log_buffer_size, log_group_mask, log_groups, log_level, log_type_mask

Attribute List

amp

Optional attribute; read/write access; type: Integer.

Alternate PLB Master Priority Register

cfgaddr

Optional attribute; read/write access; type: Integer.

Address register.

cp440

Optional attribute; read/write access; type: Integer.

CPU Control Register

cpu

Required attribute; read/write access; type: Object.

CPU object within the system.

cust0

Optional attribute; read/write access; type: Integer.

Customer Configuration Register 0

cust1

Optional attribute; read/write access; type: Integer.

Customer Configuration Register 1

ddrdl

Optional attribute; read/write access; type: Integer.

DDR Delay Line Register

ebc

Optional attribute; read/write access; type: Integer.

EBC Configuration Register

ecid0

Optional attribute; read/write access; type: Integer.

Electronic Chip ID Register 0

ecid1

Optional attribute; read/write access; type: Integer.

Electronic Chip ID Register 1

ecid2

Optional attribute; read/write access; type: Integer.

Electronic Chip ID Register 2

jtag

Optional attribute; read/write access; type: Integer.

JTAG ID Register

malrbl

Optional attribute; read/write access; type: Integer.

MAL Receive Burst Length Register

malrbs

Optional attribute; read/write access; type: Integer.

MAL Receive Bus Size Register

maltbl

Optional attribute; read/write access; type: Integer.

MAL Transmit Burst Length Register

maltbs

Optional attribute; read/write access; type: Integer.

MAL Transmit Bus Size Register

mfr

Optional attribute; read/write access; type: Integer.

Miscellaneous Function Register

mirq0

Optional attribute; read/write access; type: Integer.

Master Interrupt Request Register 0

mirq1

Optional attribute; read/write access; type: Integer.

Master Interrupt Request Register 1

pfc0

Optional attribute; read/write access; type: Integer.

Pin Function Control Register 0

pfc1

Optional attribute; read/write access; type: Integer.

Pin Function Control Register 1

pinstp

Optional attribute; read/write access; type: Integer.

Pin Strapping Register

plbtr

Optional attribute; read/write access; type: Integer.

PLB Trace Register

sdcs

Optional attribute; read/write access; type: Integer.

Serial Device Controller Settings Register

sdstp0

Optional attribute; read/write access; type: Integer.

Serial Device Strap Register 0

sdstp1

Optional attribute; read/write access; type: Integer.

Serial Device Strap Register 1

sdstp2

Optional attribute; read/write access; type: Integer.

Serial Device Strap Register 2

sdstp3

Optional attribute; read/write access; type: Integer.

Serial Device Strap Register 3

slpipe

Optional attribute; read/write access; type: Integer.

Slave Address Pipeline Register

srst

Optional attribute; read/write access; type: Integer.

Soft Reset Register

uart0

Optional attribute; read/write access; type: Integer.

UART Configuration Register 0

uart1

Optional attribute; read/write access; type: Integer.

UART Configuration Register 1

uic

Required attribute; read/write access; type: [oooo].

Universal Interrupt Controllers (UICs) within the system.

xcr

Optional attribute; read/write access; type: Integer.

PCIX Control Register

xpllc

Optional attribute; read/write access; type: Integer.

PLL Control Register

xplld

Optional attribute; read/write access; type: Integer.

PLL Divisor Register

Command List

Commands defined by interface log_object

log, log-group, log-level, log-size, log-type

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