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armv5te
- Provided by
-
armv5te, armv5te-turbo
- Class Hierarchy
-
conf-object → log-object → armv5te
- Interfaces Implemented
-
log_object, arm, simple_interrupt, exception, int_register, processor, event_poster
- Description
-
ARMv5TE processor
Attributes
- Attributes inherited from class conf-object
-
attributes, classname, component, iface, name, object_id, queue
- Attributes inherited from class log-object
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access_count, log_buffer, log_buffer_last, log_buffer_size, log_group_mask, log_groups, log_level, log_type_mask
- Attribute List
-
- address_width
- Pseudo class attribute; read-only access; type: unknown type.
(phys-bits, virt-bits) Number of bits in physical and virtual addresses.
- alt_vector_select
- Optional attribute; read/write access; type: Integer.
A 1-bit field indicating the whether the alternative reset vector (at 0xffff0000-0xffff001c) should be used instead of the vector at 0x00000000-0x0000001c.
- aprof_views
- Session attribute; read/write access; type: [[o,i]*].
((address profiler, view)*) Address profiler views selected for this processor. Affects only the display of profiling information, and has nothing to do with collecting it.
This attribute should contain a list of lists: one list for each address profiler view you want to select (in the order they are to appear), each containing first the address profiler object, then the index of the desired view.
- architecture
- Pseudo class attribute; read-only access; type: unknown type.
Implemented architecture (arm)
- big_endian
- Pseudo attribute; read-only access; type: b.
This attribute is TRUE if the processor uses big-endian byte order and FALSE if it uses little-endian.
- branch_prof_support
- Pseudo attribute; read-only access; type: b.
True if this processor supports branch profiling in -stall mode, false otherwise.
- cache_type
- Optional attribute; read/write access; type: Integer.
Cache type
- control
- Optional attribute; read/write access; type: Integer.
Control
- coprocessors
- Optional attribute; read/write access; type: [o|n{15}].
A list of objects (or None) representing coprocessors 0 to 14. (Coprocessor 15 (SCC) is implemented internally by the ARM CPU.) Each coprocessor should implement arm_coprocessor_interface.
- cpsr
- Optional attribute; read/write access; type: [i{6}].
The current program status register of each mode. The order of the modes is usr, svc, abt, und, irq, fiq.
- cpu_group
- Optional attribute; read/write access; type: Object or Nil.
The group that this processor belongs to. A cpu group is a collection if cpus that may share memory and/or send interrupts between them. The group must implement the "cpu_group"interface.
- current_context
- Session attribute; read/write access; type: Object.
Current context object.
- cycle_fractions
- Optional attribute; read/write access; type: Integer.
Modeling parameter related to processor scheduling.
- cycles
- Optional attribute; read/write access; type: Integer.
Time measured in cycles from machine start.
- dbg_compile_block
- Pseudo attribute; write-only access; type: unknown type.
Force compile of block.
- do_allocate_target_registers
- Session class attribute; read/write access; type: unknown type.
Target register allocation enable.
- do_reissue
- Session attribute; write-only access; type: Integer.
Obsolete attribute that was used to keep information about the current memory transaction if is_stalling is set.
- domain_access_control
- Optional attribute; read/write access; type: Integer.
Domain access control
- enabled_flag
- Optional attribute; read/write access; type: b.
TRUE if the processor is enabled. If FALSE, it will see time (cycles) pass but not execute steps.
- event_desc
- Pseudo attribute; read-only access; ; integer indexed; indexed type: [[o|n,s,i]*].
((object, description, time)*). All events in queue with a human-readable description. The attribute is indexed by queue (Sim_Queue_Step/Time).
- fault_address
- Optional attribute; read/write access; type: Integer.
Fault address
- fault_status
- Optional attribute; read/write access; type: Integer.
Fault status
- freq_mhz
- Required attribute; read/write access; type: i|f.
Processor clock frequency in MHz.
- gprs
- Optional attribute; read/write access; type: [[i{16}]{6}].
The general purpose registers of each mode. The order of the modes is usr, svc, abt, und, irq, fiq.
- instruction_fetch_line_size
- Session attribute; read/write access; type: Integer.
Instruction fetch line size for this processor.
- instruction_fetch_mode
- Session attribute; read/write access; type: String.
Instruction fetch mode
- is_stalling
- Optional attribute; read/write access; type: b.
TRUE if the processor is currently stalling by request of a timing-model.
- lock_granularity
- Optional attribute; read/write access; type: Integer.
Lock granularity of atomic instructions
- lsq_enabled
- Optional attribute; read/write access; type: Integer.
When non-zero, the internal load/store queue is enabled. Only applicable if ooo-mode is "micro-architecture"
- mai_debug
- Optional attribute; read/write access; type: String.
(internal) Set debug file for MAI
- main_id
- Optional attribute; read/write access; type: Integer.
Main ID
- memory_profiling_granularity_log2
- Pseudo attribute; read-only access; type: Integer.
Base 2 logarithm of memory profiling granularity.
- min_cacheline_size
- Pseudo attribute; read-only access; type: Integer.
The minimum size (in bytes) of a cache line that can be represented by Simics (when connecting a cache memhier).
- mode_counters
- Pseudo attribute; read-only access; type: [[sii]*].
((name, user-value, supervisor-value), ...) List of per-mode counters.
- ooo_mode
- Optional attribute; read/write access; type: String.
"in-order" or "micro-architecture".
- pending_exception
- Pseudo attribute; read-only access; type: Integer.
If this attribute is non-zero, then we have a pending exception that will be handled before the next instruction. This will only happen for exceptions that are handled after instruction completion (traps).
- pending_exceptions
- Optional attribute; read/write access; type: Integer.
Pending exceptions.
- physical_memory
- Required attribute; read/write access; type: Object.
Physical memory space. Must implement both the memory-space and the breakpoint interface.
- processor_number
- Optional attribute; read/write access; type: Integer.
Simics internal processor number for this CPU. Each processor must have a unique processor number. This attribute can only be set as part of an initial configuration.
- scc_list
- Pseudo attribute; read-only access; type: [[issiiiiiiiiii]*].
List of defined SPRs.
- spsr
- Optional attribute; read/write access; type: [i{6}].
The saved program status register of each mode. The order of the modes is usr, svc, abt, und, irq, fiq. The user mode saved program status register is always read as 0 and ignores writes.
- stall_time
- Optional attribute; read/write access; type: Integer.
The number of cycles the processor will stall
- stalling_info
- Optional attribute; read/write access; type: [iii].
If is_stalling is set, this contains information about the current memory operation.
- step_per_cycle_mode
- Optional attribute; read/write access; type: String.
"constant" indicates a constant finite step/cycle factor; "infinite" means that steps are run without advancing time.
- step_queue
- Optional attribute; read/write access; type: [[o|n,a,s,i]*].
((object, value, slot, step)*). Pending step queue events. object must implement the event_poster interface.
- step_rate
- Optional attribute; read/write access; type: [iii].
(q, p, r) where q/p is the step per cycle rate, p is a power of 2 and r indicates how much of a cycle that the current step has consumed.
- steps
- Optional attribute; read/write access; type: Integer.
Number steps executed since machine start.
- time_queue
- Optional attribute; read/write access; type: [[o|n,a,s,i]*].
((object, value, slot, cycle)*). Pending time queue events. object must implement the event_poster interface.
- translation_table_base
- Optional attribute; read/write access; type: Integer.
Translation table base
- turbo_alloc_memory
- Session class attribute; read/write access; type: unknown type.
Force allocation of memory.
- turbo_block_info
- Pseudo class attribute; read/write access; type: unknown type.
Block stats.
- turbo_blocks
- Pseudo class attribute; read-only access; type: [[iiiii]*].
Compiled blocks.
- turbo_code_area
- Session class attribute; read-only access; type: unknown type.
Code areas.
- turbo_debug_level
- Session class attribute; read/write access; type: unknown type.
Turbo engine debug level.
- turbo_execution_mode
- Session class attribute; read/write access; type: unknown type.
Turbo enable.
- turbo_exhaust_current_block
- Pseudo class attribute; write-only access; type: unknown type.
Allocate all code space in the current block.
- turbo_global_vars
- Pseudo class attribute; read-only access; type: unknown type.
Global symbols.
- turbo_heap_start
- Session class attribute; read-only access; type: unknown type.
Start of heap.
- turbo_link_targets
- Pseudo class attribute; read-only access; type: unknown type.
Link targets.
- turbo_max_compiled_blocks
- Session class attribute; read/write access; type: unknown type.
Max number of blocks.
- turbo_max_trace_size
- Session class attribute; read/write access; type: unknown type.
Max translation unit size.
- turbo_processor_offsets
- Pseudo class attribute; read-only access; type: unknown type.
Processor offsets.
- turbo_register_offsets
- Pseudo class attribute; read-only access; type: unknown type.
Register offsets.
- turbo_stat
- Pseudo class attribute; read/write access; type: unknown type; string indexed; indexed type: unknown type.
Stats.
- turbo_stats
- Pseudo class attribute; write-only access; type: unknown type.
When set to one, print stats.
- turbo_threshold
- Session class attribute; read/write access; type: unknown type.
Translation threshold.
- turbo_use_direct_sp
- Session class attribute; read/write access; type: unknown type.
Direct stack pointer enable.
- turbo_use_dstc_direct_lookup
- Session class attribute; read/write access; type: unknown type.
Direct DSTC lookup enable.
- turbo_use_off_page_chaining
- Session class attribute; read/write access; type: unknown type.
Off page chaining enable.
- wait_for_interrupt
- Optional attribute; read/write access; type: b.
True if the processor is in wait for interrupt state.
Command List
- Commands defined by interface log_object
-
log, log-group, log-level, log-size, log-type
- Commands defined by interface arm
-
pscc-regs
- Commands defined by interface processor
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add-memory-profiler, aprof-views, attach-branch-recorder, break-cr, cycle-break, cycle-break-absolute, detach-branch-recorder, disable, disassemble, down, enable, frame, info, instruction-fetch-mode, io-read, io-write, list, list-memory-profilers, load-binary, logical-to-physical, pos, pregs, pregs-hyper, print-statistics, print-time, psym, read, read-reg, register-number, remove-memory-profiler, set-context, set-pc, stack-trace, start-instruction-profiling, step-break, step-break-absolute, sum, symval, trace-cr, unbreak-cr, untrace-cr, up, wait-for-cycle, wait-for-step, write, write-reg, x
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