alpha-ev5

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alpha-ev5

Provided by: alpha-ev5, alpha-ev5-turbo
Class Hierarchy: conf-object → log-object → alpha-ev5
Interfaces Implemented: log_object, simple_interrupt, exception, int_register, processor, event_poster
Description: This class models an Alpha 21164 CPU.

Attributes

Attributes inherited from class conf-object

attributes, classname, component, iface, name, object_id, queue

Attributes inherited from class log-object

access_count, log_buffer, log_buffer_last, log_buffer_size, log_group_mask, log_groups, log_level, log_type_mask

Attribute List

address_width: Pseudo class attribute; read-only access; type: unknown type.
(phys-bits, virt-bits) Number of bits in physical and virtual addresses.

aprof_views

Session attribute; read/write access; type: [[o,i]*].

((address profiler, view)*) Address profiler views selected for this processor. Affects only the display of profiling information, and has nothing to do with collecting it.

This attribute should contain a list of lists: one list for each address profiler view you want to select (in the order they are to appear), each containing first the address profiler object, then the index of the desired view.

architecture: Pseudo class attribute; read-only access; type: unknown type.
Implemented architecture (alpha)

big_endian: Pseudo attribute; read-only access; type: b.
This attribute is TRUE if the processor uses big-endian byte order and FALSE if it uses little-endian.

branch_prof_support: Pseudo attribute; read-only access; type: b.
True if this processor supports branch profiling in -stall mode, false otherwise.

cpu_group: Optional attribute; read/write access; type: Object or Nil.
The group that this processor belongs to. A cpu group is a collection if cpus that may share memory and/or send interrupts between them. The group must implement the "cpu_group"interface.

current_context: Session attribute; read/write access; type: Object.
Current context object.

cycle_fractions: Optional attribute; read/write access; type: Integer.
Modeling parameter related to processor scheduling.

cycles: Optional attribute; read/write access; type: Integer.
Time measured in cycles from machine start.

dbg_compile_block: Pseudo attribute; write-only access; type: unknown type.
Force compile of block.

do_allocate_target_registers: Session class attribute; read/write access; type: unknown type.
Target register allocation enable.

do_reissue: Session attribute; write-only access; type: Integer.
Obsolete attribute that was used to keep information about the current memory transaction if is_stalling is set.

dtlb_asn: Optional attribute; read/write access; type: [i*].
(asn*) is a list of address space numbers corresponding to entries in the DTB.

dtlb_current_asn: Optional attribute; read/write access; type: Integer.
Current address space number of the DTB.

dtlb_pte: Optional attribute; read/write access; type: [i*].
(pte*) is a list of page table entries in the DTB.

dtlb_tag: Optional attribute; read/write access; type: [i*].
No documentation available.

dtlb_while_tag: Optional attribute; read/write access; type: [i*].
(tag*) is a list of complete 64-bit tag entries in the DTB.

enabled_flag: Optional attribute; read/write access; type: b.
TRUE if the processor is enabled. If FALSE, it will see time (cycles) pass but not execute steps.

event_desc: Pseudo attribute; read-only access; ; integer indexed; indexed type: [[o|n,s,i]*].
((object, description, time)*). All events in queue with a human-readable description. The attribute is indexed by queue (Sim_Queue_Step/Time).

fpcr: Optional attribute; read/write access; type: Integer.
The floating-point control register.

fregs: Optional attribute; read/write access; type: [i{32}]; integer indexed; indexed type: Integer.
(f0 ... f31) floating-point registers.

freq_mhz: Required attribute; read/write access; type: i|f.
Processor clock frequency in MHz.

instruction_fetch_line_size: Session attribute; read/write access; type: Integer.
Instruction fetch line size for this processor.

instruction_fetch_mode: Session attribute; read/write access; type: String.
Instruction fetch mode

intr_flag: Optional attribute; read/write access; type: Integer.
This flag signals whether a sequence of instructions where executed with or without interruption (and is used by RS and RC instructions).

intr_requests: Optional attribute; read/write access; type: Integer.
Pending interrupt requests.

ipr_va_lock: Optional attribute; read/write access; type: Integer.
When set to 1, the VA register is locked against further updates until read by software.

iprs: Optional attribute; read/write access; type: [i*].
(ipr0 ... iprN) internal processor registers.

iregs: Optional attribute; read/write access; type: [i{32}]; integer indexed; indexed type: Integer.
(r0 ... r31) integer registers.

is_stalling: Optional attribute; read/write access; type: b.
TRUE if the processor is currently stalling by request of a timing-model.

itlb_asn: Optional attribute; read/write access; type: [i*].
(asn*) is a list of address space numbers corresponding to entries in the ITB.

itlb_current_asn: Optional attribute; read/write access; type: Integer.
Current address space number of the ITB.

itlb_pte: Optional attribute; read/write access; type: [i*].
(pte*) is a list of page table entries in the ITB.

itlb_tag: Optional attribute; read/write access; type: [i*].
(tag*) is a list of tag entries in the ITB.

itlb_while_tag: Optional attribute; read/write access; type: [i*].
(tag*) is a list of complete 64-bit tag entries in the ITB.

lock_flag: Optional attribute; read/write access; type: Integer.
Lock flag, used by LDx_L (load-locked) and STx_C (store-conditional) instructions.

lock_granularity: Optional attribute; read/write access; type: Integer.
Lock granularity of atomic instructions

locked_address_space: Optional attribute; read/write access; type: Integer.
Address spaced locked by previous LDx_L (load-locked) instruction.

locked_virtual_address: Optional attribute; read/write access; type: Integer.
The virtual address associated with LDx_L (load-locked) and STx_C (store-conditional) instructions.

lsq_enabled: Optional attribute; read/write access; type: Integer.
When non-zero, the internal load/store queue is enabled. Only applicable if ooo-mode is "micro-architecture"

mai_debug: Optional attribute; read/write access; type: String.
(internal) Set debug file for MAI

memory_profiling_granularity_log2: Pseudo attribute; read-only access; type: Integer.
Base 2 logarithm of memory profiling granularity.

min_cacheline_size: Pseudo attribute; read-only access; type: Integer.
The minimum size (in bytes) of a cache line that can be represented by Simics (when connecting a cache memhier).

mode: Optional attribute; read/write access; type: Integer.
Current privilege mode (kernel, executive, supervisor, or user) represented by integers 0 to 3 respectively.

mode_counters: Pseudo attribute; read-only access; type: [[sii]*].
((name, user-value, supervisor-value), ...) List of per-mode counters.

ooo_mode: Optional attribute; read/write access; type: String.
"in-order" or "micro-architecture".

pal_mode: Optional attribute; read/write access; type: Integer.
Set to 1 when the processor executes in PAL mode.

pc: Optional attribute; read/write access; type: Integer.
Current program counter (PC).

physical_memory: Required attribute; read/write access; type: Object.
Physical memory space. Must implement both the memory-space and the breakpoint interface.

processor_number: Optional attribute; read/write access; type: Integer.
Simics internal processor number for this CPU. Each processor must have a unique processor number. This attribute can only be set as part of an initial configuration.

shadow_regs: Optional attribute; read/write access; type: [i{8}].
(pt0 ... pt7) is a list of PALshadow registers, used as an overlay of the integer register file when operating in PALmode.

stall_time: Optional attribute; read/write access; type: Integer.
The number of cycles the processor will stall

stalling_info: Optional attribute; read/write access; type: [iii].
If is_stalling is set, this contains information about the current memory operation.

step_per_cycle_mode: Optional attribute; read/write access; type: String.
"constant" indicates a constant finite step/cycle factor; "infinite" means that steps are run without advancing time.

step_queue: Optional attribute; read/write access; type: [[o|n,a,s,i]*].
((object, value, slot, step)*). Pending step queue events. object must implement the event_poster interface.

step_rate: Optional attribute; read/write access; type: [iii].
(q, p, r) where q/p is the step per cycle rate, p is a power of 2 and r indicates how much of a cycle that the current step has consumed.

steps: Optional attribute; read/write access; type: Integer.
Number steps executed since machine start.

time_queue: Optional attribute; read/write access; type: [[o|n,a,s,i]*].
((object, value, slot, cycle)*). Pending time queue events. object must implement the event_poster interface.

turbo_alloc_memory: Session class attribute; read/write access; type: unknown type.
Force allocation of memory.

turbo_block_info: Pseudo class attribute; read/write access; type: unknown type.
Block stats.

turbo_blocks: Pseudo class attribute; read-only access; type: [[iiiii]*].
Compiled blocks.

turbo_code_area: Session class attribute; read-only access; type: unknown type.
Code areas.

turbo_debug_level: Session class attribute; read/write access; type: unknown type.
Turbo engine debug level.

turbo_execution_mode: Session class attribute; read/write access; type: unknown type.
Turbo enable.

turbo_exhaust_current_block: Pseudo class attribute; write-only access; type: unknown type.
Allocate all code space in the current block.

turbo_global_vars: Pseudo class attribute; read-only access; type: unknown type.
Global symbols.

turbo_heap_start: Session class attribute; read-only access; type: unknown type.
Start of heap.

turbo_link_targets: Pseudo class attribute; read-only access; type: unknown type.
Link targets.

turbo_max_compiled_blocks: Session class attribute; read/write access; type: unknown type.
Max number of blocks.

turbo_max_trace_size: Session class attribute; read/write access; type: unknown type.
Max translation unit size.

turbo_processor_offsets: Pseudo class attribute; read-only access; type: unknown type.
Processor offsets.

turbo_register_offsets: Pseudo class attribute; read-only access; type: unknown type.
Register offsets.

turbo_stat: Pseudo class attribute; read/write access; type: unknown type; string indexed; indexed type: unknown type.
Stats.

turbo_stats: Pseudo class attribute; write-only access; type: unknown type.
When set to one, print stats.

turbo_threshold: Session class attribute; read/write access; type: unknown type.
Translation threshold.

turbo_use_direct_sp: Session class attribute; read/write access; type: unknown type.
Direct stack pointer enable.

turbo_use_dstc_direct_lookup: Session class attribute; read/write access; type: unknown type.
Direct DSTC lookup enable.

turbo_use_off_page_chaining: Session class attribute; read/write access; type: unknown type.
Off page chaining enable.

Command List

Commands defined by interface log_object: log, log-group, log-level, log-size, log-type
Commands defined by interface processor: add-memory-profiler, aprof-views, attach-branch-recorder, break-cr, cycle-break, cycle-break-absolute, detach-branch-recorder, disable, disassemble, down, enable, frame, info, instruction-fetch-mode, io-read, io-write, list, list-memory-profilers, load-binary, logical-to-physical, pos, pregs, pregs-hyper, print-statistics, print-time, psym, read, read-reg, register-number, remove-memory-profiler, set-context, set-pc, stack-trace, start-instruction-profiling, step-break, step-break-absolute, sum, symval, trace-cr, unbreak-cr, untrace-cr, up, wait-for-cycle, wait-for-step, write, write-reg, x

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