LX164-IRQ-PLD

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Provided by: LX164-IRQ-PLD
Class Hierarchy: conf-object → log-object → LX164-IRQ-PLD
Interfaces Implemented: log_object, pci_interrupt, io_memory
Description: The LX164-IRQ-PLD device is part of the interrupt logic in the AlphaPC 164LX design. This 8-bit I/O slave is based on the MACH210A PLD, and is located on the ISA bus at addresses 0x804, 0x805, and 0x806.

Attributes inherited from class conf-object

attributes, classname, component, iface, name, object_id, queue

Attributes inherited from class log-object

access_count, log_buffer, log_buffer_last, log_buffer_size, log_group_mask, log_groups, log_level, log_type_mask

Attribute List

cpu: Required attribute; read/write access; type: unknown type.
The Alpha EV5 CPU which is the recipient of all interrupts, and must export the alpha-ev5 interface.

irq_mask: Optional attribute; read/write access; type: unknown type.
(mask-1, mask-2, mask-3) are the interrupt mask registers writable at port 0x804, 0x805, and 0x806. Each interrupt can be individually masked by setting the appropriate bit in a mask register. An interrupt is disabled by writing a 1 to the desired position in the mask register.

irq_request: Optional attribute; read/write access; type: unknown type.
(request-1, request-2, request-3) are the interrupt request registers readable from port 0x804, 0x805, and 0x806. In these registers, a 1 means that the interrupt source has asserted its interrupt.

Commands defined by interface log_object: log, log-group, log-level, log-size, log-type

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