Tutorial Part 1: Using the Synopsys Analyser

  1. To log onto the machine where Synopsys is installed, you need to do this. It can be done from one of the CSIL machines or another Unix machine that can connect to orion.csil.
    1. At the Unix prompt type:
      ssh orion.csil
    2. Copy the Synopsys setup file into your home directory. At the Unix prompt type:
      cp /gfs1/CMPT/250/.synopsys_vss.setup ~
    3. Once you're on orion, you might want to open a new Console and run this command (it must be run on orion):
      /gfs1/CMPT/250/bin/font-cache

      You don't have to do this. If you don't, it will be done for you the first time you start the simulation (it's one-time-only). The process of building the font cache takes a few minutes and doing it now will save you time later in the tutorial.

  2. An Example Used in the Tutorial
    1. Copy the XOR example into your home directory. In order to do that, at the Unix prompt type:
      cp -r /gfs1/CMPT/250/XOR ~

      The -r option lets you copy a directory and all of its contents recursively.

    2. Use a text editor to view files that are in the XOR directory and read the comments to figure out what each of them does (also see the README file). One local setup file .synopsys_vss.setup needs special attention: You can set the editor you prefer for variable EDITCMD, set the TIMEBASE unit to which you prefer, and look at the mapping from logical directory WORK to physical directory "work"
    3. In the XOR directory make a new directory called work. In order to do that, first make sure you are in XOR directory (you can use the pwd command for that) and then type:
      mkdir work

      This is done because once you compile your files, Synopsys will put the compiled binary files (and other text files) in the default directory called work. So you have to make sure such a directory exists.

  3. Analyse the VHDL files
    1. In order to compile a .vhd file, you need Synopsys Analyser, vhdlan . At the Unix prompt simply type:
      vhdlan filename.vhd

      Note: you can also omit .vhd and simply type vhdlan filename .

      Take some time to familiarize yourself with vhdlan .

    2. Be careful! - there is a hierarchy in compiling the files within a design. In the XOR example, the and.vhd and or.vhd files have to be compiled first before you can compile xor.vhd, and finally tb.vhd. Once you change a file, all the files dependent on that have to be compiled again.
  4. Automate the process
    1. Once you've analyzed all of the files by hand once, you can create a make file that knows how your model fits together and can build it automatically by running the command
      simdepends -o Makefile tb

      This creates a file called Makefile.

    2. Now that you have the make file, you can re-analyze all of the files in the correct order just by typing the command
      make

      You may have to run make a few times if you've changed a few levels below the testbench.

    3. If you're working on a project for a long, this will save a lot of time. You don't have to remember what you changed or the exact command, just type make .

[ Go on to part 2 ]


Copyright © Greg Baker, last modified 2004-01-21.