CMPT-150 Assignment 3

Available Wednesday, June 6, 2001

Due Wednesday, June 20, 2001

Due by 12:00 noon on Wednesday, June 20, in the CMPT-150-ARC drop boxes outside K9507. Make sure you put your assignment in the box labeled for CMPT-150-ARC.

Question 1. Starting with cross-coupled NAND gates, design a positive-edge triggered D-flip-flop, going through the following steps:
a) Clocked RS latch
b) D Latch (positive level triggered)
c) Positive edge triggered D Flip-Flop
Show each step and justify your design decisions. Each device should have identical functionality to the corresponding cross-coupled NOR gate device designed in class.

Question 2. The nifty widget company has a factory that produces widgets. In an effort to cut costs, the manager has decided to replace the quality-control employees with a machine that detects defects. A camera positioned above the conveyer belt can detect 4 types of defects in the widgets: gouges, missing teeth, no paint and incorrect paint colour. Each widget will be assigned to one of three categories (pass, fail, re-cast) based on the following rules:

Your circuit should have 4 inputs (G, T, P, C) and 3 outputs (R, F, P)

Show your design procedure, justify any design decisions, simulate your circuits in LogicWorks/DesignWorks, test your circuit and justify your choice of test cases. Provide a circuit printout and an annotated timing diagram.

Question 3. Design a sequential circuit using 2 D-flip-flops which will produce the following sequence:

00, 11, 01, 10, 00, ...

Show your design procedure. Provide a circuit printout and timing diagram showing the complete sequence.